C8051T63x-DK
3. Hardware Setup
See Figure 1 for a diagram of the hardware configuration.
1.
2.
3.
4.
Attach the desired daughter board to the motherboard at connectors P1 and P2.
If using the QFN Socket Daughter Board, place the device to be programmed into the socket.
Place shorting blocks on J7 and the +3VD-VDD_PWR jumper pair on J6, as shown in Figure 1.
Connect the motherboard’s P5 USB connector to a PC running the Silicon Laboratories IDE using the USB
Cable.
5. Connect the ac-to-dc power adapter to connector P3 on the motherboard.
Notes:
?
?
?
?
Use the Reset icon in the IDE to reset the target when connected during a debug session.
Remove power from the motherboard and remove the USB cable before removing a daughter board from the
motherboard. Connecting or disconnecting a daughter board when the power adapter or USB cable are connected can
damage the motherboard, the daughter board, or the socketed device.
Remove power from the motherboard and remove the USB cable before removing a C8051T63x device from the socket.
Inserting or removing a device from the socket when the power adapter or USB cable are connected can damage the
motherboard, the daughter board, or the socketed device.
The above hardware setup instructions configure the development system to be powered through the onboard 3.3 V
regulator. For other power options, see Section 7.3.
C8051T630 EDB
SW
PWR
LED
SW
J9
P1.3
P0.7
C8051T630-MB
P3
AC Adapter
J12
D7
J2
R8 F336
J3
J5
P1
VPP
J11
+3VD
VDD_EXT
VDD_F326
VDD_CCP2103
J7
J6
PWR
VDD_PWR
VDD_PWR
VDD_PWR
VDD_PWR
Place shorting blocks on
J7 and J6 as shown.
P2
D10
D11 D12
RUN / STOP DEBUG
PWR
USB Cable
SILICON LABS
www.silabs.com
J4
USB ACTIVE
RTS_F326
P1.1
RTS_CP2103
J8
CTS_F326
P1.2
CTS_CP2103
P5
DEBUG
J10
J13
P4
COMM
RX_F326
P0.4
RX_CP2103
TX_F326
P0.5
TX_CP2103
RESET
Figure 1. Hardware Setup (Emulation Daughter Board)
2
Rev. 0.1
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